Today you build the DIV register, the simplest hardware clock, which ticks once every 256 CPU cycles by accumulating the cycle counts your CPU already returns. This cycle-budget pattern is the foundation for the full timer and, later, the display.
Make the DIV register count up once every 256 CPU cycles.
Hardware keeps time by counting CPU cycles, and the simplest clock is the
divider register DIV at 0xFF04, which increments once every 256
cycles and wraps around at 0xFF. To drive it, feed the timer the cycle count
each instruction returned - the value your Step has been handing back since lesson
6 - and let it accumulate until it crosses a threshold.
The full timer adds TIMA (a counter that ticks at a rate chosen by TAC and
raises an interrupt when it overflows to TMA), but they all share this
cycle-budget pattern. Getting the accumulator right - ticking only on each
complete 256-cycle span, not smearing partial progress - is the idea that makes
every time-based feature, from the timer to the display, stay in sync with the
CPU.
func (t *Timer) Step(cycles int) {t.divCounter += cyclesfor t.divCounter >= 256 {t.divCounter -= 256t.div++ // wraps at 0xFF naturally}}
The DIV, TIMA, TMA, and TAC timer registers and their tick rates.